Testers

UltraFLEX

Applications

• Mobile Application Processor
• Digital Baseband Processors
• High Data Rate RF Transceivers
• RF Connectivity Devices
• mmWave
• 5G
• Mobile Power Management ICs (PMIC)
• Microprocessors
• Network Processors
• High Speed SERDES (SERializer/DESerializer) and Backplane Transceivers
• Storage Controllers
• High-end Microcontrollers
• Audio and Video Processors

Advantages

Superior Flexibility, Throughput & Scalability

The UltraFLEX scales from low pin count, analog-dominant devices to massive parallel test of high-end processors with superior parallel

Maximum Test Quality and Yield

The UltraFLEX’s performance allows integrated circuit producers to meet the conflicting goals of “zero” defect rates and maximum device.

Faster Time to Production

Teradyne’s IG-XL software speeds time to market and reduces cost of test by transforming test program development.

ETS Family

Applications

Industrial Power Management

Smart power stages, low dropout regulators, DC-DC converters, voltage regulators, boost regulators, mult-phase PWMs, battery chargers, hot swap power managers, gate drivers

Precision Analog

• Op amps, instrument amplifiers, video amplifiers, audio amplifiers

Automotive Analog 

• BMS monitors, fuel injectors, ABS controllers, airbag controllers, automotive smart switches, CAN transceivers, motor drivers

Mobility 

• USB chargers, wireless chargers, PMICs

Advantages

Scalable Site Count

• Unique Multi-sector Architecture
• Fast and easy capacity expansion when device volumes increase with support for a wide range of site counts and easy upgradeability to higher site counts

Highest Throughput

• Fast PCIexpress communication infrastructure, optimized API’s and extensive test time profiling tools result in the shortest test times in the industry
• Multi-sector Architecture delivers high parallel test efficiency with no effort from the test engineer
• The largest applications space available, plus the APEX architecture’s integrated matrices & muxes enable maximum site count.

Fastest Time to Market

• Mature, stable & powerful EV-MST Software enables test engineers to develop test programs efficiently.
• Multi-sector Architecture allows engineers to focus on single or low site count program development and scale to a high site count program with near-zero effort. High parallel test efficiency is achieved automatically.
• The APEX architecture reduces relays by an order of magnitude, enabling simpler dibs, higher site count and shorter development times.

Automotive-level Test Quality

• Precision instrumentation and conservative, guaranteed specifications deliver stable results that are repeatable from tester to tester and device to device.
• Comprehensive, integrated alarm infrastructure ensures every device pin receives the intended stimulus

J750

J750Ex-HD: the MCU Test Solution

Microcontroller Units (MCUs) are used in automobiles, mobile electronics and robotics. As you go through your day, dozens of MCUs are in your electronic devices working to provide unique features and Teradyne’s J750 family most likely tested them.  With a growing installed base of over 6,000 test systems and widely available at more than 50 Outsourced Assembly and Test (OSAT) locations, Teradyne’s J750 is the industry standard for high volume tests of low-cost devices.

Reducing the cost of tests is crucial in a highly competitive semiconductor market. The J750Ex-HD family reduces the cost of test by 25-50% over competitive offerings with higher throughput and increased site count. Higher site count is delivered by the High Density (HD) family of instruments and software providing the fastest path to lowest cost of test.

J750 – LitePoint RF Test System

The option of adding LitePoint instrumentation to the J750 system delivers a cost-effective, complete production test solution covering global wireless connectivity standards. With the proliferation of embedded RF components such as Bluetooth into microcontrollers and other stand-alone wireless SoC devices, the J750 can test an even broader range of applications while continuing to deliver superior cost efficiency and fast time-to-market. By utilizing the same LitePoint instrumentation that the engineers do initial bench bring-up and downstream module testing, the total effort and time to get to market with new products is improved significantly.

Titan Asynchronous System Level Test Platform

The Teradyne Titan™ System Level Test (SLT) platform delivers maximum flexibility, scalability and density in semiconductor test environments that require the highest levels of system performance testing. Titan is Teradyne’s solution for high-volume mobile application processor SLT requirements.

Semiconductor components continue to grow in complexity as process nodes shrink. IC designers are now designing complete System-on-Chip (SoC) products that contain core processors, analog I/O, digital I/O, modem and/or other IP blocks along with embedded software. Utilizing System Level Test as a third test process step, following wafer and package test, enables the semiconductor manufacturer to test software and hardware together to validate connections between IP blocks in a manner that isn’t otherwise practical. Titan provides the additional test coverage needed to meet stringent end customer failure rate requirements for improved product quality.

Production Proven Solution

• Titan’s asynchronous slot architecture offers unmatched operational efficiency. It optimizes utilization and provides a 30% throughput advantage over traditional batch systems, thereby lowering the cost of test across a large mix of products.
• The asynchronous testing capability also enables maintenance to be performed without stopping system operation.
• When product change-over is required, an automated process minimizes the time needed to execute changing the product to be tested.
• Titan is offered as either a 320 or 424-site system with the same small footprint, enabling a high number of devices to be tested per square meter of factory floor space.
• A smaller 20-site Titan development station is also available for DUT board design verification testing, developing and validating test programs, troubleshooting DUT board HW issues, DUT board test and repair activities, and enabling SLT in non-production environments.  This development station allows R&D, QA and Production to use the same DUT test board, enabling a faster ramp to production with a common engineering and production platform.

Magnum V

Ultra-High-Performance FLASH and DRAM Memories Test Solution Teradyne’s Magnum V systems deliver high throughput and high parallel test efficiency for ultra-high-performance FLASH and DRAM memories. Magnum V’s largest configuration delivers up to 20,480 digital channels at 1600Mbps per channel.

High Performance
The Magnum V’s 1.6Gbps SuperMux mode covers today and tomorrow’s next generation ultra-high speed memory devices.

High Parallelism
The Magnum V GV can be configured for up to 20,480 digital pins to maximize the parallel test capacity for production test. The maximum number of tester resources is routed into the smallest possible area at the highest pin performance.

Scalable Platform
For each configuration, it is easy to add additional tester channels to existing “cable ready” TIU’s while maintaining DSA compatibility at the maximum parallelism for current and future devices.

Independent Site Resources
The local 3.4GHz Quad-Core site processor supports multiple test programs for concurrent tests, single insertion MCP LPDDR and NAND at optional parallel efficiency.

LPDDR Feature Set
The Magnum V features pattern and timing extensions for DRAM to provide for fusion memory coverage and flash and DRAM test on a common platform.

Applications

• eMMC
• Toggle NAND
• Legacy NAND
• ONFI FLASH
• MCP
• eMCP
• LPDDR2
• LPDDR3